Intel Hardware Design Flow

Intel Embedded Platform Hardware Design Process Guide

With the rapid development of technology, how to quickly provide complete solutions is becoming the main challenge for modern high-tech enterprises. This requires the development team to conduct detailed research and deeply understand the actual needs, and conduct demand analysis, such as product performance indicators, product function requirements, testing and certification requirements, project cost objectives, etc., to further clarify the design tasks. Intel's product line is relatively extensive. According to design tasks and requirements, learn platform materials for evaluation. When designing a reliable, reasonable, and economically feasible solution, special attention must be paid to the compliance of various functional parameters of the Intel platform with actual needs. For details, please refer to Intel product documentation.

1. Intel Platform Documentation Terminology

1.1 External Design Specification EDS (External Design Specification)

This design document contains information on the use and implementation of the platform support reference design to help customers design products using Intel. Also includes performance metrics or design information for system designs using specific Intel components, as well as Intel processor cores, graphics, memory controllers, bus signal descriptions, system memory matching, number of bus interfaces, electrical characteristics, packaging information, clock distribution , the voltage requirements of the chip, and specific information such as power-on sequence and input/output interface.

1.2 Platform Design Guide PDG (P1atformDeSignGuide)

Design Guides contain information to support the use and implementation of reference designs to assist customers designing with Intel products. Also includes design information and design recommendations for PCB board layout and board-level system design using specific Intel components, specific to the wiring and routing recommendations for each interface of the CPU and chip, such as DDR topology, DMI, DDI, DSI , SATA, PCIe, USB, etc.; the Design Guide will also include design guidelines for power distribution and power-on sequence in the platform, as well as detailed specifications and requirements for PCB stacking, wiring, interfaces, equal lengths, and vias.

1.3 Customer Reference Design Schematic CRB (Customer Reference Board Schematic)

The customer reference board schematic diagram describes the characteristics of a complete Intel product, including the schematic design of a specific product customer reference board, which will connect the various bus interfaces of the Intel corresponding platform, and the system functions can be realized through debugging, including the system frame diagram , power supply scheme, clock, platform power-on sequence, power management, detailed schematic diagram implementation to specific component connections, etc.

1.4 Customer Reference Design Layout Document (Customer Reference Board fi1e)

The customer reference board layout file is a layout file designed for the target system. In one-to-one correspondence with the customer reference design schematic, use the reference customer reference board user guide, customer reference test plan, and customer reference system design.

1.5 Platform layout checklist (Layout check 1ist)

The layout checklist is an important part of reviewing the design guide and implementing a system layout design. It is used together with the relevant platform design guide from the overall situation to the details. Each specific bus interface has detailed requirements and instructions, such as high-speed bus Wiring, number of vias, clock distribution, characteristic impedance, length limit, etc. Check possible problem points to enhance the stability of the motherboard.

1.6 Schematic design check list

The schematic diagram checklist is a list and list of items that need to be reviewed in the product design schematic diagram, the recommended design and guidance of the schematic diagram, and the wiring differences and problems between the self-examination and the CRB schematic diagram. Check the connection of the peripheral signals of the chip, the connection of the high-speed signal, the power supply status, the clock distribution, and the shielding precautions of the unused bus interface. It is often used in conjunction with the external design specification EDS in the schematic design.

2. Intel project design process

2.1 Intel project design preliminary preparation

In the early stage of actual project design, it is necessary to conduct demand analysis and clarify development tasks. Designers need to contact Intel's technical support engineers in time to understand the product roadmap, and discuss the chip solution of the platform based on the actual needs of the project; the types of debugging tools and use documents in the development and debugging phase, and clarify the project development plan and timetable; apply for Intel CRB simultaneously The reference design board is debugged and evaluated in advance to shorten the production and development cycle and obtain Intel's technical support and design resources in advance. Of course, in the process of referring to the characteristic indicators of EDS and other documents, it is also necessary to conduct preliminary product software implementation feasibility studies, such as discussing SW development and design with BIOS/OSV manufacturers, MCU implementation and system cooperation, and OS and driver function implementation. , the choice of system cooling scheme, etc. Combined with the project requirements, start to prepare design documents and design schemes. It is necessary to design the system architecture first, draw a system block diagram and discuss the implementation with relevant design departments, sort out the conceptual block diagram of power distribution, clock, power-on sequence, reset, interrupt, debugging, etc. , combined with the Intel platform customer reference design schematic diagram CRB, from device selection and unit scheme realization to the formulation of the overall scheme. It is necessary to refer to documents such as PDG, EDS, and CRB, and pay special attention to the operating voltage, operating frequency, system timing, and overall power consumption of the chip to meet the system design requirements.

2.2 Intel hardware schematic diagram drawing stage

In the schematic diagram drawing stage, first refer to the Intel chip library file to ensure that the layout of the schematic diagram is clear and reasonable, and the layout is evenly arranged. Learn the descriptions of each group of signals in the EDS document: system memory, bus interface, electrical characteristics, and power-on sequence (this is the platform The important foundation of power-on design), consult relevant information from EDS, and refer to CRB to define the power-on sequence of the project platform according to the timing requirements of the main functional modules of the platform; secondly, combined with project functional requirements, refer to intel CRB Schematic design, pay special attention to power distribution, clock arrangement, high-speed signal connection, etc. After the first draft of the schematic is drawn, it needs to be carefully combined with Intel's schematic design check list to check for error-prone places, especially DDR, PCIe , USB, DDI and other high-speed signals; then, hardware developers need to discuss and prepare the BIOS/Boot loader program with SW colleagues in time, so as to make full preparations for the first version of proofing and trial production. Of course, selecting and drawing other components is also an important part, and it is necessary to fully consider the convenience of post-processing and production process and the substitution of components. You can apply for Intel technical support personnel to review the project schematic diagram at the same time. Combined with the inspection results, convene a schematic design team for final discussion and modification, and meet customer functional requirements such as function, performance, and redundancy design. Specs and standards and indicators of the Intel platform Conformity, and the manufacturability, debuggability, testability of the factory, etc., the final modification is determined.

2.3 Intel PCB layout design stage

In the layout and PCB design stage, it is necessary to cooperate with the organization/ID/EMI/RF/Power/thermal team in time to discuss the placement of the main chips to meet the design requirements of the overall project plan. First, combined with the PCB stack structure, calculate whether the width of the PCB traces of each group of high-speed signals can be smooth, discuss the position of the power supply device and the placement of sensitive components, and generate a formal design document: pay attention to the I/0 interface, temperature, and clock elements. The focus of the discussion on device location and height-limited area is second. When drawing the PCB layout, it is necessary to choose a reasonable stack-up design, arrange the main components evenly, and make the high-speed signal wiring smooth; special attention should be paid to the shielding of interference sources and sensitive signals. The power supply of functional modules should be relatively isolated; pay attention to the wiring distribution of high-speed signals and power supplies to avoid mutual interference; reasonably plan the layout of power supply modules and power supply distribution paths, and increase the width of power supply lines as much as possible according to the current size of the printed circuit board. reduce loop resistance. The length of high-speed signal traces must comply with the Intel specification, and the actual length on the PCB needs to be filled in to check the trace length in the equal length table. Reasonably plan the reference plane and power plane of high-speed signals, pay special attention to the wiring of high-speed signals such as DDR, DMI, DDI, DSI, SATA, PCIE, USB, etc., to avoid signal interference and interference effects; increase the gap between high-speed signals and analog signals Distance, increasing the distance between signal lines as much as possible can effectively reduce capacitive crosstalk; the loop area should be minimized to reduce inductive crosstalk. In the design of the ground wire, pay attention to the noise interference of the digital ground to the analog ground, the digital ground and the analog ground can be separated, the ground wire should be as thick as possible, and the ground wire of the digital circuit system forms a closed loop, which can improve the anti-noise ability. Pay attention to the signal impedance matching of signal integrity, uniform line width, and reasonable line spacing; avoid impedance discontinuity of transmission lines, reduce the use of stub lines, etc. Sensitive signal traces such as analog signals, clock signals, and temperature signals should be kept as short as possible and kept away from interference sources such as power supplies. The number and distribution of vias are reasonable, especially the number of vias for high-speed signals does not exceed the requirements, you can refer to CRB layout file, layout check list and PDG. Comply with the Intel reference design document PDG, so that the power distribution is reasonable, the clock routing is appropriate, and the high-speed signals such as DDR are not affected or affected; in the later stage, carefully check one by one with the layout checklist, especially high-speed signals, etc. Length, power supply, EMI countermeasures and other parts. When approaching the early stage of board release, Intel professional engineers can be invited to conduct simultaneous inspections. After receiving feedback results, a layout inspection meeting will be held in a timely manner. After discussions and revisions, formal design documents will be produced for release and production.

2.4 Intel PCB production stage

During PCB production, it is necessary to check the bill of materials synchronously, coordinate the trial production schedule, prepare the first article test plan, debug tool software, and debug equipment. When the first PCB is received, first conduct the power-related open-short circuit test, and then conduct the power-on test after confirming that it is correct, focusing on checking the power supply timing, clock, reset and other signals, and comparing the power-on timing requirements in the Intel platform EDS, software and hardware development The personnel timely adjust and solve the design that does not meet the requirements of the spec. After the power on is completed, the functional test report and signal integrity test report need to be completed, and then the system power consumption and power quality test, the compatibility of the main components and the system stability are performed. Testing; generate formal test reports and change documents for subsequent traceability of related issues. If necessary, you can seek help from Intel platform application engineers in debugging and verifying the motherboard.

2.5 Intel hardware platform debugging stage

According to the test results after the first trial production, modify the schematic diagram and layout design, further check the accuracy of the upper part of the material, simultaneously solve the problems related to factory production and functional testing, and form a design document: after the second trial production, further verify the system Functional stability, such as high and low temperature, aging, running for a long time and switching on and off multiple times, etc.; solve the concentration problems found by the relevant testing department in a timely manner. After the third boarding, the number of units and the number of times to verify the stability of the system are multiple times, and it is also necessary to improve the production yield before the final mass production of the product, such as simplifying the design, using the arrangement to reduce the number of parts, etc. During the testing and testing process, the concentration problems encountered were resolved until mass production and shipment began.

Summarize

The purpose of Intel's embedded platform design is to make the system equipment achieve the expected functions, and the system can run more stably. This article focuses on the functions and connotations of Intel's main design documents, and solves the problem of X86 development engineers in the process of designing embedded platforms. All kinds of confusion encountered and guidance schemes are given, which can be used in most of the system hardware design process to achieve better project results, which can shorten the time to market and development resources. Of course, in the modern fast-paced product development cycle, the requirements of various projects are also very different. We can choose the key development direction in a targeted manner based on the actual situation.

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