MCAPI multi-core software development

Multi-core software development method based on MCAPI

With the advancement of technology, the speed of upgrading of electronic products is getting faster and faster. The method of simply increasing the main frequency to improve system performance is close to the bottleneck, and the use of multi-chip processors to build a system does not meet the miniaturization requirements of the product. Traditional single-core processors can no longer meet the increasing performance requirements, and multi-core processors that can complete parallel task processing have emerged as the times require. Modern multi-core processors mainly rely on increasing the number of cores rather than frequency to improve performance. At the same time, the high integration of chips also brings problems such as resource scheduling and power consumption. With the increase of parallelism of multi-core processors, the emergence of various homogeneous and heterogeneous multi-core processors makes software development face enormous challenges. How to efficiently implement algorithms on multi-core and how to allocate resources reasonably are all problems that need to be solved.

1. Introduction to multi-core DSP devices

TMS320C6678 is a classic homogeneous multi-core digital signal processor (Digital Signal Processor, DSP) launched by Texas Instruments (TI) in 2010. It contains 8 DSP cores, and each core works at a maximum of 1.4GHz. The performance under the frequency can reach 22.4G Floating-point Operations Per Second (FLOPS), support Hyperlink and other high-speed interfaces, and can be widely used in mobile communication, medical electronics, high-performance computing and other fields.

InterProcessor Communication (IPC) between cores and communication between cores and peripherals are the key points of multi-core software development. In response to this demand, Texas Instruments provides a multi-core navigator on its new generation of Keystone architecture processors, including a hardware queue manager and packet-based direct memory access (Direct Memory Address, DMA) to achieve high-speed data transfer between cores. transmission. Using the multi-core navigator for inter-core communication can be realized by reading, writing and querying the corresponding control registers through software, or by event triggering through internal hardware. This method can greatly simplify the inter-core communication processing, but there are still shortcomings. Once the software topology changes, or the computing load of the core needs to be adjusted to improve system performance, this part of the workload is very heavy, and the application is limited by the manufacturer.

2. Overview of multi-core communication application program interface

MCAPI (Muhicore Communications Application Program Interface) is a lightweight application program interface standard based on message passing proposed by the Multi-Core Alliance, which is especially suitable for inter-core communication and synchronization of embedded system processors. The application of MCAPI is not limited by the number of processor cores, processor architecture and operating system, and provides source-level compatibility support, which is very scalable. Compared with ordinary multi-chip inter-processor communication, multi-core processor inter-core communication generally requires low latency and high bandwidth. Most multi-core processors contain on-chip memory or cache. To avoid computational bottlenecks, inter-core communication needs to reduce unnecessary memory accesses. Key concepts such as domain (domain), node (node), endpoint (end.point), and channel (channel1) are defined in MCAPI. Domains are implementation-dependent and can be either a single chip with multiple processor cores or multiple processors on a board. A node can be a thread, a processor, or a hardware accelerator, etc. Usually, a processor core can be used as a node. An endpoint is a communication point similar to a socket, and a node usually includes multiple endpoints. The channel provides a point-to-point First In First Out (FIFO) memory between a pair of endpoints for communication, and the direction is unidirectional.

In addition, MCAPI defines 3 basic types of communication: message, packet channel and scalar channel. Message is the most commonly used type of communication. It provides a mechanism for sending and receiving data between endpoints, supports dynamic adjustment of priority, and can be used for synchronization, initialization, and load balancing. Packet channels and scalar channels provide lightweight stream communication mechanisms with little program overhead.

3. Multi-core software development process based on Poly-Platform tool

3.1 Introduction to Poly—Platform Tool

Poly-Platform is an integrated development tool suite for multi-core software development provided by Poly Core, including Poly-Mapper, Poly-Generator, Poly-Messenger/MCAPI, Poly-Templates and other functional modules. Using this tool for development can establish application program nodes based on the MCAPI standard, use the Graphical User Interfaces (GUI1 wizard) to automatically generate codes, and realize applications in homogeneous multi-core and heterogeneous multi-core without modifying the source code. Flexible configuration and expansion on different platforms such as , multi-processor, etc., are not limited by manufacturers, and have broad application prospects.

3.2 Multi-core software development process

After the Poly-Platform software is integrated into the Eclipse software environment by plug-in, corresponding menus and options will appear in TI's Code Composer Studio development environment, and the multi-core software development based on Poly-Platform can be carried out. Here we choose TMS320C6678 multi-core DSP device for development, and take the ring topology of 8 DSP cores connected in turn and transfer data as an example to describe the development process.

(1) Establish topology. Firstly, a topology (Topology) project is established. The topology mainly describes the mapping relationship of the application program on the (multi-core) platform. Use the Poly-Mapper tool to set the properties in the topology mapping file generated after the project is established, select the processor type, set the number of nodes to 8 (corresponding to 8 DSP cores), the names are N0-N7, and the operating system is TI’s DSP dedicated operating system. Then draw 8 nodes in the topology diagram, and draw a link (1ink) in the middle of each node to obtain the 8-node topology diagram of the ring structure.

(2) Create a memory-mapped file and allocate resources. Create a memory-mapped file and allocate several segments (section1, set its starting address, size, direction and other parameters. These segments are used for memory access regions (Memory Access Regions, MARs) and links (1ink). Among them, the memory access region Including some commonly used resource pools (poo1), such as message pool, message queue pool, data pool, waiting pool, etc. Sharing resources between different nodes through MARs can improve resource utilization efficiency and system performance.

(3) Perform memory mapping in the topology diagram. For each node (N0-N7), set its accessible memory access area. Then, it is also necessary to set parameters for each resource pool included in the memory access area, such as the starting address. Similarly, parameter setting is also required for the link.

(4) Establish a node project. This is basically the same as the conventional DSP development process. Node projects are established for 8 nodes (corresponding to processor cores), and then the mapping relationship between these 8 node projects and the topology project established in the first step needs to be established.

(5) Write initialization code and configuration files. First, use the Poly-Generator tool to convert the topology diagram into C language based on topology definition and the corresponding header files, and store them in the working directory of each node project. Then use the Polv-Template tool to automatically generate node initialization files and hardware initialization files for each node project according to the MCAPI template that comes with the software. Finally, write TI-specific real-time software components (Real Time Software Component, RTSC) configuration files and linker command files for memory allocation.

(6) Write the main function of each node project. The main content of the main function includes calling the node initialization function, the hardware initialization function, and the function of sending and receiving messages between nodes (based on MCAPI). These can be quickly completed using the template provided by the Poly-Template tool.

(7) Write the application program of each node project. Implement the user's algorithm code and add it to the node project. This step is completely consistent with the conventional DSP development process.

(8) Establish target configuration file and RTSC platform. First establish the target configuration file for simulation debugging, then establish the RTSC platform for hardware configuration, and add it to the node project. These are TI-specific files.

(9) Compile, debug, and run. Compile, debug, and run each node project, and observe the program running results. Be careful not to compile the topology project.

(10) Program performance analysis and optimization. With the help of the interactive report environment provided by the Poly-inspector tool, the performance analysis of the multi-core software implementation can be carried out, which is convenient for users to optimize and adjust the program.

in conclusion

The current computing environment is becoming more and more diversified. DSP, programmable logic device (Field Programmable Gate Array, FPGA), and graphics processing unit (Graphics Processing Unit, GPU) all have strong computing capabilities and are suitable for different applications. occasion. Multi-core processor is the current research hotspot, and highly integrated heterogeneous multi-core processor is the future development trend. The development of software based on multi-core is always a difficult point, which brings great challenges to software developers. The multi-core software development method based on MCAPI proposed in this paper can be applied to homogeneous multi-core, heterogeneous multi-core and multi-processor platforms. Topology design, computing load balancing, inter-core communication and resource allocation in the optimization process significantly improve development efficiency.

The above is the MCAPI-based multi-core software development method introduced by Shenzhen Zuchuang Microelectronics Co., Ltd. for you. If you have software and hardware function development needs for smart electronic products, you can rest assured to entrust them to us. We have rich experience in customized development of electronic products, and can evaluate the development cycle and IC price as soon as possible, and can also calculate PCBA quotations. We are a number of chip agents at home and abroad: Songhan, Yingguang, Jieli, Ankai, Quanzhi, realtek, with MCU, voice IC, Bluetooth IC and module, wifi module. We have hardware design and software development capabilities. Covering circuit design, PCB design, single-chip microcomputer development, software custom development, APP custom development, WeChat official account development, voice recognition technology, Bluetooth wifi development, etc. It can also undertake the research and development of smart electronic products, the design of household appliances, the development of beauty equipment, the development of Internet of Things applications, the design of smart home solutions, the development of TWS earphones, the development of Bluetooth earphone speakers, the development of children's toys, and the research and development of electronic education products.